Senior FPGA Engineer - Systems Team
- Type
- Job
- Organization
- Riverlane
- Location
- Cambridge
- Deadline
- Rolling or not stated
- Who can apply
- On-site in Cambridge
- Posted
- 29 September 2026
- Skills mentioned
- Python, C++
About this Opportunity
Senior FPGA Engineer – Systems Team Cambridge, UK | Full-time | Permanent | Hybrid
Eligibility
- Experience with state-of-the-art FPGA platforms (e.g.
- AMD/Xilinx MPSoCs/RFSoCs, Altera Stratix 7 or Stratix 10)
- Experience in writing SystemVerilog or VHDL
- Implementation of modern classical decoders on FPGA e.g.
- LDPC, turbo-codes;
- Implementation of Ethernet and High-Speed Protocols
What you get
- Salary: £70,000 to £108,000, DOE
Documents you may need
- Updated CV / Resume
- Cover Letter (tailored to this role)
How to apply
- Click the "Apply — via Arbeitnow" button to go to the source page.
- Read the full description and confirm you meet the requirements.
- Prepare your CV and cover letter tailored to this role.
- Submit your application through the official portal.
- Follow up within 1–2 weeks if you do not hear back.
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